Part Number: 48LC16M16A2, MT48LC16M16A2
Function: SDR SDRAM ( 4 Meg x 16 x 4 banks )
Package: 54-ball FBGA, 54-pin TSOP II
Manufacturer: Micron Technology
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Description
The 256Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’s 67,108,864-bit banks is organized as 8192 rows by 2048 columns by 4bits. Each of the x8’s 67,108,864-bit banks is organized as 8192 rows by 1024 columns by 8 bits. Each of the x16’s 67,108,864-bit banks is organized as 8192 rows by 512 columns by 16 bits.
Pinout
Features
1. PC100- and PC133-compliant
2. Fully synchronous; all signals registered on positive edge of system clock
3. Internal, pipelined operation; column address can be changed every clock cycle
4. Internal banks for hiding row access/precharge
5. Programmable burst lengths: 1, 2, 4, 8, or full page
6. Auto precharge, includes concurrent auto precharge and auto refresh modes
7. Self refresh mode (not available on AT devices)
48LC16M16A2 Datasheet PDF
